1. Field of the Invention
The present invention relates to a system for and method of compiling a program, and particularly to a system for and method of compiling a source program to generate microinstructions associated with sets of instructions of the source program and optimum to a processor operative with horizontal-type instructions.
2. Description of the Prior Art
Conventionally, tools have been known for designing programs running with a microprocessor oriented to horizontal-type microinstructions. For example, "Software Techniques for Signal Processors" Computer and Application's Mook, Vol. 15, pp. 31-32, Corona Publishing Co., Ltd., Japan, Jan. 1, 1886, teaches an assembler described with mnemonic symbols assisting the human memory and adapted to formats of instructions for digital signal processors (DSPs). Assembler instructions employed for that assembler system have mnemonic symbols defining an effective part of microoperations included in a set of horizontal-type instructions. Into the remaining part, not defined, a default assembler instruction is automatically inserted. Thus a set of instructions will be completed.
Digital signal processors are usually adapted to pipeline operations. For example, four operations may be concurrently executed, the operations including loading a pair of read-out registers with data from a main memory, multiplying the contents of the pair of read-out registers, performing an arithmetic or logical operation, and storing the resultant data in the memory. In order to accomplish such concurrent operations, microinstructions are formed into a horizontal or lateral format, which includes an operation field defining an arithmetic or logical operation, and a transfer field for addressing memory locations from which data is read out and to which data is stored.
A microinstruction defining addition, for example, includes three processings: loading a pair of read-out registers with data from the memory; adding the contents of the pair of registers to provide resultant data which is stored in a write-in register; and transferring the data in the write-in register to the memory. The horizontal structure of microinstructions enables those three kinds of processings to be executed simultaneously. From the viewpoint of the data to be processed, however, it takes three steps of microinstructions which must be executed before data resulting from an addition is stored in the internal memory. Consecutive additions may be performed with successive execution of microinstructions by effectively utilizing pipeline architecture, thereby enhancing the throughput of data processing.
The pipeline processor described above may concurrently handle three streams of operations, such as additions, to efficiently utilize pipeline architecture. For that aim, according to the prior art assembler system discussed above, a single assembler instruction is required to define three microoperations, such as load, add and store, with three mnemonic instructions. Programmers are therefore required to describe a program with such a conventional instruction format with the hardware structure of a pipeline processor they use being taken into account.
For example, to perform additions the pipeline processor executes simultaneously three separate and independent kinds of operations on different data. More specifically, the processor concurrently executes reading out from a memory location a first data to be operated on in the following microinstruction step, adding a second data which was read out of the memory in the immediately preceding microinstruction step, and writing in the memory a third data resulting from the operation executed in the immediately preceding microinstruction step. The programmer has to describe a single assembler instruction defining such three independent operations. This requires much more time and work before a source program is completed with assembler instructions.